While I appreciate the CAFC’s concern that the PTO often takes an overly broad interpretation of claim terms that is neither reasonable nor consistent with the specification, the court may have been overly harsh in this situation. Nevertheless, this is a good case to consult when asserting that the PTO’s interpretation is unreasonably expansive in view of the underlying subject matter. Although subsequent events may cause a claimed operation to occur, this may not be sufficient to transform a preceding element into one that meets the specific limitations of the claim.

Background / Facts: The patent on reexamination at the PTO here is directed to controlling a dynamic random access memory device (DRAM) to implement a synchronous process known as “interleaving,” which eliminates the indefinite “wait state” problem associated with asynchronous DRAMs and allows the memory controller to perform other tasks and send additional requests to other DRAMs while a read/write operation is pending. In this regard, the specification describes a “signal” from the memory controller that is used to indicate when the DRAM is to begin processing (either immediately upon receipt or after a specified number of clock cycles). The closest prior art is another Rambus patent (discussed in the background of the present application) that implemented an earlier version of interleaving where different delay values are stored at the DRAM in corresponding registers and the memory controller identifies with each read/write request which register to use.

Issue(s): Whether the claimed “providing a signal to the memory device, wherein the signal indicates when the memory device is to begin sampling” broadly encompasses the prior art approach of conveying not a direct indication but a pointer to a register containing a delay value.

Holding(s): No. After going through a rather lengthy history of the dispute here, the court noted somewhat incredulously that “a reference that was overcome during initial examination, distinguished as prior art in the patent specification, and found not to anticipate by at least two different tribunals, now – according to the Board – discloses each and every element of the claims.” The court disagreed. Although the prior art’s request packets contain a bit, that bit merely selects an access-time register; it does not contain any timing information itself. “Although subsequent events or signals from the access-time registers may cause the DRAM to begin an operation, that part of the [prior art’s] operation does not transform the bit into a signal that meets the limitations of the claim.”

Full Opinion